The invention relates to the field of fabricating integrated circuits and other electronic devices and in particular to an improved method of photoresist patterning that involves a removable anti-reflective coating during the formation of dual damascene structures.
Photoresist processing is a key element that must be controlled in order to achieve a low cost, high throughput manufacturing method for the production of integrated circuits in semiconductor devices. Integrated circuits are typically formed by the sequential deposition of layers on a substrate. Each layer is usually patterned by first exposing a photoresist film on a substrate through a mask that contains a device pattern defined by opaque regions consisting of chrome and transparent regions such as quartz. Then the developed pattern in the photoresist film is transferred through an underlying substrate layer by means of a plasma etch process. Alternately, the photoresist pattern can serve as a mask for an ion implant step into an underlying layer. In back end of line (BEOL) processing, patterns consisting of trenches and via holes are filled with a conductive material to form interconnects comprised of horizontal connections or trenches within a layer and vertical connections or via holes between two layers. Conductive materials used in the interconnects are separated by insulating or dielectric materials to prevent crosstalk between the metal wiring. A popular method of manufacturing metal interconnects is a dual damascene structure in which vias and trenches are filled simultaneously with metal in an efficient, high yield process.
A low k dielectric material such as the example described in U.S. Pat. No. 6,287,990 is preferred as an insulation layer. Carbon is incorporated into a silicon dioxide layer to lower the k value. SiO2 with a dielectric constant (k) of 4 has been widely used in the industry but new technology generations require a low k of about 2.5 or less. The layer in this prior art is deposited by a plasma enhanced chemical vapor deposition (PECVD) technique involving a silane having a Sixe2x80x94Cxe2x80x94H moiety and an oxidizing gas such as oxygen or N2O.
There is a constant focus on reducing the size of metal interconnects so that devices with higher performance can be provided to satisfy demand. The lithography method used to define patterns is constantly being optimized to enable the printing of features such as lines/spaces, trenches, or contact holes with smaller critical dimensions (CD). A CD is usually a small space width or line width that controls the ultimate performance of the device. For example, finer gate widths allow a faster transistor speed while denser line/space arrays result in more memory storage per unit area. A smaller critical dimension (CD) in a feature such as a trench is more easily printed when the process is optimized to decrease the K constant or when xcex is reduced according to the equation, R=Kxcex/NA. R is the minimum CD that can be resolved while K is a process constant, xcex is the exposure wavelength, and NA is the numerical aperture of the exposure tool. In recent years, technology nodes have progressively moved from 250 nm through 180 nm and 130 nm and are now in the 100 nm regime for CD sizes. As a result, the preferred xcex which has been 248 nm for CD sizes from about 250 nm through 130 nm is now shifting to 193 nm for features smaller than 130 nm.
The process constant K can be lowered in a variety of ways such as phase shifted masks, improved illumination methods, and optimized photoresist imaging techniques. No matter which wavelength of radiation is used to expose the photoresist, reflectivity control of radiation off the underlying layer is always a concern. Typically, a CD specification includes the requirement that the feature must be maintained within xc2x110% of a targeted dimension. This includes mask error factors, photoresist line width variations, and an etch transfer component. Therefore, the photoresist contribution to the xc2x110% allowed variation must be considerably less than 10% in order not to consume the entire budget. One method that has been successfully implemented in many cases is an anti-reflective coating or ARC which is coated prior to the photoresist and greatly minimizes the reflected light from the substrate during the exposure process. The ARC thickness is typically around 1000 Angstroms or less while some photoresist layers have a thickness as thin as 2000 Angstroms. The photoresist pattern must be transferred through the ARC and into an underlying substrate. A thin ARC is preferred since the ARC/photoresist etch rate ratio is close to 1:1 and enough photoresist must remain after the ARC open etch to serve as an etch mask for transferring the pattern into the substrate.
CD variations in the photoresist pattern may result from topography in which the substrate is not level. This leads to thickness variations in the photoresist coating that can be larger than 100 Angstroms. Small changes in photoresist thickness on the order of 100 Angstroms or less are known to result in significant CD variations. Even if the substrate is level, differing compositions within the substrate may cause a CD variation in the photoresist pattern. For example, the photoresist pattern may cross over metal lines contained within the substrate. The metal lines are likely to have a higher reflectivity than the surrounding substrate and thereby cause a higher amount of reflected light which re-exposes the photoresist from below. If the photoresist feature is a line/space array crossing above a metal line, the resulting photoresist line will be smaller in width where it passes over metal than where it crosses over a less reflective part of the substrate. This is true for a positive tone composition in which regions of exposed photoresist are washed away in an aqueous base developer and unexposed areas remain on the substrate. For negative tone photoresists, exposed regions remain on the substrate and unexposed areas are washed away in developer. With a negative tone composition, a photoresist line would become larger with an increased dose from reflected light. In either case, reflectivity control provided by an ARC is crucial for maintaining a line width or CD within a xc2x110% specification and for achieving a manufacturable process when a highly reflective substrate is involved.
A photoresist process is further characterized by its process latitude which is the range of exposure dose and focus settings that can be applied while still maintaining the CD within a xc2x110% variation. By controlling reflectivity, an ARC enables a larger process latitude than is realized in the absence of an ARC. Thus, an ARC can prevent a considerable amount of expensive rework caused by a CD being out of specification. Reworking a substrate consists of stripping the patterned film, recoating and re-exposing a new photoresist layer. Rework slows throughput by tying up process and measurement tools for unscheduled period of time.
An important property of an ARC is that its refractive index which is comprised of a real component (n) and an imaginary component (k) can be tuned in many cases by adjusting the composition of the material to minimize reflectivity at the photoresist/ARC interface which improves line width control in the photoresist layer. Another valuable property of an ARC is a high optical absorbance so that light which enters the ARC layer does not reflect off the underlying substrate and re-expose the photoresist layer from below. ARCs are commercially available as organic spin-on coatings that are baked at curing temperatures of about 175xc2x0 C. to 225xc2x0 C. to render them immiscible with liquid photoresist solutions that are subsequently spin coated on the ARC. Inorganic ARCs such as SiOXNY can be deposited with a PECVD technique at temperatures up to 400xc2x0 C. Examples of both types are provided in U.S. Pat. No. 6,323,121 in which a silicon oxynitride is formed as an etch stop material and a spin-on organic ARC is used to protect the bottom of a via during a trench etch. Organic ARCs are generally removed with a plasma ashing method.
An ARC described in U.S. Pat. No. 6,350,390 is applied for the purposed of improving CD control during photoresist patterning while fabricating a gate electrode. The ARC is either an organic polymer coating or a dielectric material containing silicon. A method of removing the ARC is not discussed. The main point is to further control the gate size by adjusting the trim etch to compensate for line width variations in the photoresist masking layer.
In U.S. Pat. No. 6,214,637 an amorphous carbon ARC is formed by a PECVD method at a preferred temperature of around 200xc2x0 C. involving a hydrocarbon gas such as methane but no carrier gas is included. The initial refractive index of n=1 is increased to a 1.2 to 2.5 range by annealing the layer and optionally with additives such as oxygen, silicon, and fluorine. The extinction coefficient (k component) is maintained within a range of 0.2 to 0.8. Oxygen and argon plasma are later used to remove this ARC which has a thickness between 150 and 10000 Angstroms. An important property is that the refractive index remains constant at all thickness above 150 Angstroms.
Photoresist patterning in a dual damascene structure has unique challenges, especially when forming a trench in a via first process. For example, the photoresist process must contend with considerable topography since an opening on a level surface is produced at the same time as removing exposed photoresist inside a hole below the trench level. Although silicon nitride and silicon oxynitride are commonly employed as an etch stop layer at the top of a damascene stack and have been used as ARCs, these materials are known to interact with photoresists, especially those that operate by a chemical amplification mechanism in which one photon from the exposing radiation can generate a strong acid that causes many chemical events in the photoresist film. Trace amounts of nitrogen containing compounds such as ammonia in the inorganic ARCs can neutralize the acid within the photoresist layer and thereby interfere with the imaging process. One frequent result is a foot at the bottom of the photoresist profile where exposed photoresist which should have been removed by developer remains on the substrate. This undesirable feature can influence a subsequent etch transfer step by projecting a wider CD than intended in the design. A vertical sidewall on the photoresist profile is preferred for etch transfer.
Organic ARCs can also interact with an overlying photoresist during the patterning process. These ARCs often contain thermal acid generators that are used to cure the anti-reflective coating. If the thermal curing is incomplete, trace amounts of acid may be released into the overlying photoresist and thereby induce a chemical reaction. In a positive tone photoresist, an undercut at the base of the sidewall may result. If the line width is small as in a gate feature, the line may topple over and an expensive rework process is necessary to correct the problem.
Therefore, it is desirable to employ an ARC that does not contain traces of acid or base which can interfere with a photoresist patterning process. The ARC must also be immiscible with photoresist layers that are coated on it. Another valuable property is to have a refractive index (n and k values) that is tunable in order to be compatible with a number of different photoresists that may be required for various layers in the fabrication process. An ARC should also be easily removed such that no residues remain on the substrate and it must be readily implemented in manufacturing to enable a low cost, high throughput fabrication scheme. During dual damascene processing, the ideal ARC can be applied as an etch stop at the top of the stack and also assist in CD control of a photoresist patterning step. In this case, the ARC should provide a high etch selectivity relative to the underlying dielectric layer during pattern transfer of a via opening in the photoresist through the dielectric layer.
An objective of the present invention is to provide a removable ARC that does not contain traces of acid or base that can interfere with an overlying photoresist during a patterning process.
A further objective of the present invention is to provide a removable ARC that has a tunable refractive index to minimize reflectivity and improve CD control for a number of different photoresists.
A still further objective of the present invention is to provide an ARC that can be easily removed without leaving residues and which can be readily incorporated into a manufacturing scheme.
A still further objective of the present invention is to provide an ARC than can be incorporated into a dual damascene scheme as an etch stop layer that enables a high etch selectivity with respect to pattern transfer through an underlying dielectric layer.
To achieve these objectives an ARC comprising an amorphous carbon layer is incorporated into a fabrication method for making integrated circuits in semiconductor devices. In one embodiment, the ARC is formed by a PECVD method on a substrate. A methyl silane, preferably trimethylsilane, is employed as the carbon source and is transported into the deposition chamber by a carrier gas such as helium. Argon plasma is used as the amorphising agent which is defined as the means of imparting amorphous character into the carbon film. Typical plasma conditions are a RF power of 50 to 500 Watts, a bias of 500 to 2000 Watts, and a temperature of 300xc2x0 C. to 400xc2x0 C. Argon flow is between 50 and 200 standard cubic centimeters per minute (sccm) while helium flow is 100 to 1000 sccm and trimethylsilane flow is 50 to 200 sccm. In this manner, an amorphous carbon ARC with n=1.3-1.6 @ 193 nm and k=0.25 to 0.68 @ 193 nm is produced. The oxide/xcex1-carbon etch ratio is 18:1 when n=1.43 and k=0.4 and the etch rate ratio is 50:1 when n=1.55 and k=0.67. The gas mixture can be adjusted to tune the n and k values and the etch ratio relative to oxide.
Once the ARC is formed on a substrate, a photoresist is spin coated on the ARC and patterned. The resulting feature in the photoresist layer is transferred through the ARC with a plasma etch such as one generated from oxygen and CF4 gas. When the opening is formed in the ARC, the etch is changed to a plasma that selectively removes the underlying substrate while the ARC serves as an etch mask. After the etch transfer is complete, the remaining photoresist is removed with a stripper and the ARC is removed with a plasma etch such as CF4 and oxygen or both layers can be removed with a plasma etch. The amorphous carbon layer does not contain an acid or base and does not intermix with the photoresist layer. Furthermore, it can be tuned so that the refractive index provides a minimum amount of reflected light to re-expose the photoresist from below. Since trimethylsilane is readily available, it can be easily attached to a PECVD chamber in a manufacturing scheme.
In a second embodiment, the ARC described in the first embodiment is deposited as the top layer in a dual damascene stack wherein it is formed over a dielectric layer. A photoresist is then coated on the ARC, baked, exposed, and developed to form a via opening. The via opening is transferred through the ARC and then through the dielectric layer by employing the ARC as an etch mask with a high etch selectivity relative to the dielectric material. The original photoresist is stripped and replaced with a second photoresist that is patterned to form a trench opening which is transferred through the ARC and into the dielectric layer. In both patterning steps, the ARC helps to control the CD within a tight specification and does not interact with the photoresist to produce a foot or undercut profile. The second photoresist and ARC are then removed by an ashing method. A liner is deposited in the trench and via hole followed by deposition of a metal. The final step in forming the dual damascene structure is to planarize the metal by a process such as chemical mechanical polish (CMP) so that it is coplanar with the top of the dielectric layer.